HKUST Library Institutional Repository Banner

HKUST Institutional Repository >
Electronic and Computer Engineering  >
ECE Patents >

Please use this identifier to cite or link to this item:
Title: Under-bump metallization layers and electroplated solder bumping technology for flip-chip
Authors: Chan, Philip Ching-Ho
Xiao, Guo Wei
Keywords: Solder bumps
Bump-reflow-control layer
Photoresist process
Photolithography process
Issue Date: 3-Apr-2007
Citation: US Patent 7,199,036 B2, 2007
Abstract: A series of improved processes and methods to manufacture solder bumps on the wafer which shrink the space among solder bumps and reduce the cost of manufacturing. A design method and a relevant manufacturing process are introduced to form an organic material or metal material layer, which is called a Bump-Reflow-Control Layer. The pad patterns can be defined by this method. A mechanical part is designed with a hermetic cover to improve the photoresist process. The series of photolithography process including the designing method of related photolithography mask is introduced to achieve the high quality and thick photoresist.
Rights: This patent is also available at HKUST Technology Transfer Center Patent Search at <>
Appears in Collections:ECE Patents

Files in This Item:

File Description SizeFormat
US7199036TTC.PA.0211_20070423.pdf839KbAdobe PDFView/Open

All items in this Repository are protected by copyright, with all rights reserved.