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HKUST Institutional Repository >
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ECE Patents >
Please use this identifier to cite or link to this item:
http://hdl.handle.net/1783.1/3436
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| Title: | Under-bump metallization layers and electroplated solder bumping technology for flip-chip |
| Authors: | Chan, Philip Ching-Ho
Xiao, Guo Wei |
| Keywords: | Solder bumps
Bump-reflow-control layer
Photoresist process
Photolithography process |
| Issue Date: | 3-Apr-2007 |
| Citation: | US Patent 7,199,036 B2, 2007 |
| Abstract: | A series of improved processes and methods to manufacture solder bumps on the wafer which shrink the space among solder bumps and reduce the cost of manufacturing. A design method and a relevant manufacturing process are introduced to form an organic material or metal material layer, which is called a Bump-Reflow-Control Layer. The pad patterns can be defined by this method. A mechanical part is designed with a hermetic cover to improve the photoresist process. The series of photolithography process including the designing method of related photolithography mask is introduced to achieve the high quality and thick photoresist. |
| Rights: | This patent is also available at HKUST Technology Transfer Center Patent Search at <http://patentsearch.ttc.ust.hk/ListPatentsDetail.asp?id=245> |
| URI: | http://hdl.handle.net/1783.1/3436 |
| Appears in Collections: | ECE Patents
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Files in This Item:
| File |
Description |
Size | Format |
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| US7199036TTC.PA.0211_20070423.pdf | | 839Kb | Adobe PDF | View/Open |
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