HKUST Institutional Repository >
Electronic and Computer Engineering >
ECE Master Theses >
Please use this identifier to cite or link to this item:
|Title: ||A 2-V 1.8-GHz fully-integrated CMOS frequency synthesizer for DCS-1800 wireless systems|
|Authors: ||Kan, Kwok-Kei|
|Issue Date: ||1999 |
|Abstract: ||A 2-V 1.8-GHz fully integrated CMOS frequency synthesizer is designed and tested for use in DCS-1800 wireless systems. The synthesizer employs a dual-loop architecture to realize a monolithic design with more optimal trade-off among phase noise, channel spacing, reference frequency and settling time compared to the conventional integer-N phase-locked loop architecture.
One of the critical challenges in designing such a dual-loop synthesizer is to design a voltage-controlled oscillator with a very wide frequency tuning range and a low phase noise. A ring oscillator (VCO) has been proposed to achieve these tough specifications and will be presented.
The synthesizer employs a dual-path active loop filter to minimize its chip area. The prototype is fabricated in a standard 0.5-μm CMOS process without any external components. The measured phase noise is -111 dBc/Hz at 600-kHz offset from a 1.87-GHz carrier. With an active chip area of 2000 x 1000 μm2, the test chip consumes 95mW.|
|Description: ||Thesis (M.Phil.)--Hong Kong University of Science and Technology, 1999|
x, 104 leaves : ill. ; 30 cm
HKUST Call Number: Thesis ELEC 1999 Kan
|Appears in Collections:||ECE Master Theses|
Files in This Item:
All items in this Repository are protected by copyright, with all rights reserved.