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Please use this identifier to cite or link to this item:
http://hdl.handle.net/1783.1/6114
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| Title: | Complementary metal-oxide-semiconductor transistor structure for high density and high performance integrated circuits |
| Authors: | Chan, Philip Ching-Ho
Chan, Mansun
Wu, Xu Sheng
Zhang, Shengdong |
| Keywords: | Three-dimentional integrated circuit
Fin FET
CMOS
High density
High performance |
| Issue Date: | 9-Jun-2009 |
| Citation: | US Patent 7,545,008 B2, 2009 |
| Abstract: | A semiconductor device may include a substrate and an insulating layer formed on the substrate. A multi-layer fin may be formed on the insulating layer and may include two semiconducting layers isolated by an insulating layer in vertical direction. A first MOS type device comparising a first source region, a first channel region and a first drain region is arranged on the first semiconducting layer in the multi-layer fin. A second MOS type device comprising a second source region, a second channel region and a second drain region is arranged on the second semiconducting layer in the multi-layer fin. A gate electrode is provided so as to be vertically adjacent to the first and second channel regions. |
| Rights: | This patent is also available at HKUST Technology Transfer Center Patent Search at <http://patentsearch.ttc.ust.hk/ListPatentsDetail.asp?id=391> |
| URI: | http://hdl.handle.net/1783.1/6114 |
| Appears in Collections: | ECE Patents
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Files in This Item:
| File |
Description |
Size | Format |
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| US7545008.pdf | | 967Kb | Adobe PDF | View/Open |
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