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Please use this identifier to cite or link to this item: http://hdl.handle.net/1783.1/7496
Title: Fabrication and characterization of normal-incidence p-i-n InGaAs photodetectors grown on Si substrates
Authors: Gao, Yan
Issue Date: 2011
Abstract: The integration of III-V optoelectronics on silicon substrates for optical interconnection and optic fiber communication has become topical in recent years. Optical interconnection is a promising technology to replace copper interconnection due to its low-power and high-speed advantages. III-V materials with excellent optical property for active devices can be integrated on silicon substrates. This concept has been extensively demonstrated by wafer bonding technology which requires smooth surfaces, extra substrate transfer and removal processes. Direct epitaxial growth is a more straight-forward wafer-level solution for low-cost mass production in comparison to the bonding technique, if challenges of the hetero-growth can be properly managed. Our research aims to integrate III-V based optoelectronic devices on silicon substrates by means of epitaxial growth techniques using metalorganic chemical vapor deposition (MOCVD). The first objective is to realize device-quality indium gallium arsenide (InGaAs) material on silicon substrates. This thesis focuses on the fabrication and characterization of normal-incidence p-i-n InGaAs photodetectors on silicon. Demonstration of high-speed photodetectors will be an essential step forward towards heterogeneous integration of optoelectronics on silicon. Circular devices with diameters ranging from 20 μm to 60 μm were fabricated. Devices with the same p-i-n structure on gallium arsenide (GaAs) and indium phosphide (InP) substrates were also grown and fabricated for comparison. A reduction of the device area resulted in diminished dark current and increased 3dB bandwidth. A 20μm-diameter device on silicon exhibited a dark current of ~0.2μA, a responsivity of ~0.5 A/W at 1550 nm with -1V bias and an optical bandwidth of 10GHz at -5V. An open eye diagram at 10 Gb/s at a low reverse bias of 1 V was also demonstrated. Parasitic capacitance was the major factor that limited the bandwidth. Future waveguide InGaAs photodetectors on silicon-on-insulator (SOI) wafers will likely result in a lower dark current and a higher speed due to compact waveguide device sizes with a smaller parasitic capacitance.
Description: Thesis (M.Phil.)--Hong Kong University of Science and Technology, 2011
xvii, 67 p. : ill. ; 30 cm
HKUST Call Number: Thesis ECED 2011 Gao
URI: http://hdl.handle.net/1783.1/7496
Appears in Collections:ECE Master Theses

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