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Under-bump metallization layers and electroplated solder bumping technology for flip-chip

Authors Chan, Philip Ching-Ho HKUST affiliated (currently or previously)
Xiao, Guo Wei HKUST affiliated (currently or previously)
Issue Date 2007-04-03
Source US Patent , 7,199,036 B2, 2007
Summary A series of improved processes and methods to manufacture solder bumps on the wafer which shrink the space among solder bumps and reduce the cost of manufacturing. A design method and a relevant manufacturing process are introduced to form an organic material or metal material layer, which is called a Bump-Reflow-Control Layer. The pad patterns can be defined by this method. A mechanical part is designed with a hermetic cover to improve the photoresist process. The series of photolithography process including the designing method of related photolithography mask is introduced to achieve the high quality and thick photoresist.
Language English
Format Patent
Access View details of TTC.PA.211S via HKUST Technology Transfer Center
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US7199036TTC.PA.0211_20070423.pdf 859719 B Adobe PDF