Please use this identifier to cite or link to this item:

Performance analysis of space division ATM switches with input-output buffering

Authors Iun, Pak Chio
Issue Date 1996
Summary Performance analysis of ATM switches has been an active research topic in these recent years. Numerous models have been proposed throughout the world. Most of these models are developed for analyzing specific ATM switches with specific kinds of incoming traffic. The resultant models are usually highly dependent on the structure of the switches. This restrict the usage of these models to other switches with different structures. In addition most of these models are built with two unrealistic assumptions: the incoming traffic has random destinations and the size of the switch tends to infinity. In this research an analytical model for the performance analysis of ATM switches is developed to overcome the above problems. This model can be applied to a large class of ATM switches called the input-output buffering ATM switches. We consider general incoming traffic with asymmetrical output loading and correlated destinations which is most common in ATM networks. Our model is constructed by studying the behavior of the switch, i.e., blocking in the switch fabric and the correlation of incoming traffic. The switch fabric is then modeled as a closed queueing network. By changing the characteristics of this closed queueing network, different types of switches can be studied. This model gives accurate results for the maximum throughput, the cell loss probability and the mean response time under different traffic conditions.
Note Thesis (M.Phil.)--Hong Kong University of Science and Technology, 1996
Language English
Format Thesis
Access View full-text via DOI
Files in this item:
File Description Size Format
th_redirect.html 339 B HTML
Copyrighted to the author. Reproduction is prohibited without the author’s prior written consent.