||Standard digital CMOS technology is gaining importance and maturity as a technology for RFIC design. Both active and passive devices need to be characterized and improved in order to accelerate its acceptance among circuit designers. However, most of the focus in RF device characterization has been on GaAs technology. In the past few years, there has been a great deal of interest from industry in using silicon-based circuits, particularly CMOS, for RF applications. This allows RF and low-frequency, low-power analog and digital circuits to be integrated together. However, very little work has been done in fully characterizing and optimizing RF active and passive devices on silicon. The first part of this research focuses on addressing the need for better MOS RF noise models, particularly for short-channel devices. To achieve this, first an analytic framework for relating microwave-based noise parameters to circuit-based noise parameters is developed. On-wafer measurements are made to extract microwave-based noise parameters for transistors for a 0.5um CMOS process transistor, and equivalent circuit model parameters are fit to this data in order to obtain trends as a function of bias and device geometry. The second part of the research looks at methods to obtain improved inductor quality factor in designing high-performance RF circuits such as low-noise amplifiers. Specifically, performance enhancement through the use of very thick (~20um) metal lines is investigated, since the advent of electroless bumping processes for flip-chip fabrication make this a simple post-processing option for any IC. The work here presents RF inductor design, simulation and measurement focusing on improving quality factor.