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A 70MHz CMOS Gm̳-C bandpass filter with automatic tuning

Authors Choi, Yu Wing
Issue Date 1999
Summary In this thesis, the relationship among power consumption, linearity and noise performance of a CMOS transconductance (Gm)-C bandpass filter are studied and optimized. Two 70 MHz bandpass filters are fabricated and measured. Both filters are 6th-order bandpass filters constructed by cascading 3 stages of biquads. The center frequency is 70MHz with a 3-dB bandwidth of 18OKHz for the GSM standard. The first design of the filter uses unbalanced gm cell design for the gyrators and cross-coupled gm cell design for the input gm cells. Only the last 2 stages function properly with a shifted center frequency at 92.5 MHz. The measured IIP3 is -4 dBm with an equivalent input noise of 653 nV/[root]Hz and a gain of 8 dB. The power consumption is 82 mW with a single 3 V supply. The filter is fabricated in 0.8 μm HP process. The chip area is 1.2 mm by 1 mm. The use of MOS capacitors causes the center frequency to deviate by 36 % and a lowering of the Q value. The second design of the filter employs actively biased gm cells for both the gyrators and the input gm cells. Automatic tunings of both center frequency and Q are included. The actively biased gm cells have been modified for better linearity. Linear capacitors are employed as the loading capacitance. The series resistance of the capacitors causes a lowering of Q value to about 14 for the whole filter. The corresponding gain is -51.5 dB at 70 MHz. On the other hand, the automatic frequency tuning loop works from 35 MHz to 68 MHz. While the automatic Q tuning loop operates from 25 MHz to 72 MHz and can operate with a deviation of center frequency of ±8 MHz. The master biquads in the automatic tuning loops can function properly with a Q of 200 or above. The IIP3 of the master biquad is -14 dBm with an equivalent input noise of 1.41 μV/[root]Hz and a gain of 0 dB. The power consumption of the automatic tuning loop is 28 mW while that of the filter is 88 mW with a single 2.5 V supply. The whole filter is fabricated in 0.5 μm HP process. The chip area is 0.8 mm by 1.2 mm.
Note Thesis (M.Phil.)--Hong Kong University of Science and Technology, 1999
Language English
Format Thesis
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