Please use this identifier to cite or link to this item: http://hdl.handle.net/1783.1/5177

Wafer level LED packaging with integrated DRIE trenches for encapsulation

Authors Zhang, Rong
Issue Date 2008
Summary Light emitting diodes (LEDs) are a promising candidate for solid-state lighting (SSL). Nowadays, LEDs are widely used in mobile phones, display panels, traffic lights, automobiles, and special illuminations. In these applications, LEDs are mostly used in the form of LED arrays. However, currently most LEDs are packaged on an individual component basis. The component level packaging process has a relatively low throughput and high cost, which are obstructive to the propagation of LEDs. Therefore, a more efficient packaging process is in demand. In this study, a wafer level LED packaging process is developed. 4 inch silicon wafers served as the substrates for flip-chip mountable LED chips. A UV curable epoxy was applied as the encapsulant. The encapsulation process takes advantage of DRIE trenches that are integrated with the silicon substrate to define the encapsulation region, and can adjust the geometry of the encapsulation via controlling the volume of the epoxy. Both the fabrication of the LED substrates and the encapsulation for LEDs are completed at wafer level. LED packages can be directly obtained after wafer singulation. In order to optimize the quality of this newly developed packaging process, several design and processing considerations need to be investigated, including the viscosity and the volume of encapsulant, the geometry of trenches, epoxy dispensing and curing parameters, and the layout of the LED substrates. It is found that the viscosity of the encapsulant is crucial for the dispensing process. Trenches show little constraint effect with a low viscous epoxy. An epoxy with a high viscosity is preferred. The double-line trenches can provide stronger constraints than single-line trenches. The constraint effect of the double-line trenches can be improved via applying deep trenches and a short sitting time (the time after the epoxy dispensing and before the UV curing). In order to obtain good quality substrates on wafer, the orientation of the conductive traces should be at a large angle to the radial direction. Detailed discussions on these critical processing parameters are given in this thesis.
Note Thesis (M.Phil.)--Hong Kong University of Science and Technology, 2008
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Language English
Format Thesis
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