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A single-chip UHF RFID reader in 0.18 mu m CMOS process

Authors Wang, Wenting HKUST affiliated (currently or previously)
Lou, Shuzuo HKUST affiliated (currently or previously)
Chui, Kay W.C.
Rong, Sujiang HKUST affiliated (currently or previously)
Lok, Chi Fung
Zheng, Hui
Chan, Hin-Tat HKUST affiliated (currently or previously)
Man, Sau-Wing
Luong, Howard Cam View this author's profile
Lau, Vincent Kin Nang View this author's profile
Tsui, Chi-Ying View this author's profile
Issue Date 2008
Source IEEE journal of solid-state circuits , v. 43, (8), 2008, AUG, p. 1741-1754
Summary A single-chip UHF RFID reader that integrates all building blocks-including an RF transceiver, IQ data converters, and a digital baseband-is implemented in a 0.18 mu m CMOS process. A high-linearity RX front-end and a low-phase-noise synthesizer are proposed to handle the large self-interferer, which is a key challenge in the reader RX design. Highly reconfigurable mixed-signal baseband architecture for channel-selection filtering is proposed to achieve power optimization for multi-protocol operation with different system dynamic ranges and data rates. The reader dissipates a maximum power of 276.4 mW when transmitting maximum output power of 10.4 dBm and receiving the tag's response of -70 dBm in the presence of -5 dBm self-interferer while occupying 18.3 mm(2).
ISSN 0018-9200
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Language English
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