Please use this identifier to cite or link to this item: http://hdl.handle.net/1783.1/77721

Wafer Level Bumping Technology for High Voltage LED Packaging

Authors Wei, Tiwei HKUST affiliated (currently or previously).
Qiu, Xing HKUST affiliated (currently or previously)
Lo, Chi Chuen HKUST affiliated (currently or previously)
Lee, Ricky Shi-wei View this author's profile
Issue Date 2015
Source Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2015 10th International, Taiwan, Taipei , 2015, p. 54-57
Summary This paper proposed and developed an effective thermal management method for HVLED packaging with wafer level bumping technology. In the HVLED package, multiple thermal bumps were fabricated on HVLED chips to enhance heat dissipation. Cu-Sn-Cu bumps were used. The size, pitch and stand-off height of bumps were optimized for underfill dispensing. Moreover, a high thermal conductivity underfilll was used to further improve the thermal performance of the package.
ISSN 2150-5934
ISBN 9781467396905
Language English
Format Conference paper
Access View full-text via DOI
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